Renesas Optimizing Linker (W2.04.00 ) 14-May-2017 07:24:07 *** Options *** -subcommand=DefaultBuild\EZPLforRL78v2andCCRLv102.clnk -Input=DefaultBuild\opt_byte.obj -Input=DefaultBuild\main.obj -Input=DefaultBuild\cstart.obj -Input=DefaultBuild\common.obj -Input=DefaultBuild\timer.obj -Input=DefaultBuild\int.obj -Input=DefaultBuild\port.obj -Input=DefaultBuild\watchdogtimer.obj -Input=DefaultBuild\system.obj -Input=DefaultBuild\systeminit.obj -Input=DefaultBuild\panel.obj -Input=DefaultBuild\digitalio.obj -Input=DefaultBuild\clk.obj -Input=DefaultBuild\74hc.obj -SECURITY_ID=00000000000000000000 -DEVICE=E:\tools\micom\Renesas\CS+\CC\Device\RL78\Devicefile\DR5F10Y47.DVF -DEBug -NOCOmpress -OUtput=DefaultBuild\EZPLforRL78v2andCCRLv102.abs -LIBrary=E:\tools\micom\Renesas\CS+\CC\CC-RL\V1.02.00\lib\rl78nm4s.lib -LIBrary=E:\tools\micom\Renesas\CS+\CC\CC-RL\V1.02.00\lib\rl78nm4r.lib -ENTry=_start -LISt=DefaultBuild\EZPLforRL78v2andCCRLv102.map -SHow=ALL -AUTO_SECTION_LAYOUT -STARt=.text,.textf,.SLIB,.RLIB/000CE -ROm=.data=.dataR -ROm=.sdata=.sdataR -NOMessage -NOLOgo -end *** Error information *** *** Mapping List *** SECTION START END SIZE ALIGN .vect 00000000 0000007f 80 0 .const 00000080 00000080 0 2 .constf 00000080 00000080 0 2 .sdata 00000080 00000080 0 2 .data 00000082 00000085 4 2 .option_byte 000000c0 000000c3 4 1 .security_id 000000c4 000000cd a 1 .text 000000ce 00000581 4b4 1 .textf 00000582 00000582 0 1 .SLIB 00000582 00000582 0 1 .RLIB 00000582 000005e7 66 1 .bss 000ffce0 000ffcea b 2 .dataR 000ffcec 000ffcef 4 2 .sbss 000ffe20 000ffe26 7 2 .sdataR 000ffe28 000ffe28 0 2 *** Total Section Size *** RAMDATA SECTION: 00000016 Byte(s) ROMDATA SECTION: 00000092 Byte(s) PROGRAM SECTION: 0000051a Byte(s) *** Symbol List *** SECTION= FILE= START END SIZE SYMBOL ADDR SIZE INFO COUNTS OPT SECTION=.vect FILE=rlink_generates_01 00000000 0000007f 80 SECTION=.data FILE=DefaultBuild\main.obj 00000082 00000085 4 SECTION=.option_byte FILE=DefaultBuild\opt_byte.obj 000000c0 000000c3 4 SECTION=.security_id FILE=rlink_generates_02 000000c4 000000cd a SECTION=.text FILE=DefaultBuild\main.obj 000000ce 0000053f 472 _main 000000ce 8 func ,g 1 _main_loop 000000d6 b func ,g 1 _hdwinit 000000e1 a func ,g 2 _panel_init0 000000eb d func ,g 1 _panel 000000f8 55 func ,g 1 _WDT_Reset 0000014d 4 func ,g 0 _TM_10ms 00000151 2e func ,g 1 _MOV1_ 0000017f 1 func ,g 0 _NOT1_ 00000180 7 func ,g 0 _WAIT 00000187 d func ,g 0 _BitMemGet 00000194 1d func ,g 3 _ByteMemGet 000001b1 8 func ,g 2 _BitMemSet 000001b9 3b func ,g 3 _ByteMemSet 000001f4 9 func ,g 4 _Port_Set 000001fd 2c func ,g 1 _Port_Get 00000229 1d func ,g 1 _MD_INTTM00 00000246 11 func ,g 0 _TM00_Init 00000257 2f func ,g 1 _MD_INTP0 00000286 2 func ,g 0 _MD_INTP1 00000288 2 func ,g 0 _MD_INTP2 0000028a 2 func ,g 0 _MD_INTP3 0000028c 2 func ,g 0 _MD_INTIT 0000028e 2 func ,g 0 _INT_Init 00000290 2b func ,g 1 _PORT_Init 000002bb 1d func ,g 1 _WDT_Init 000002d8 1 func ,g 0 _Clock_Init 000002d9 1 func ,g 0 _SystemInit 000002da f func ,g 1 _DGIN_Initialize 000002e9 12 func ,g 1 _DGIN_Counter 000002fb 4 func ,g 2 _CLK_Initialize 000002ff 15 func ,g 1 _IC74HC166_Initialize 00000314 14 func ,g 1 _DGIN_Counter_Clear 00000328 4 func ,g 0 _CLK_Counter_Clear 0000032c 4 func ,g 0 _IC74HC166_Counter_Clear 00000330 4 func ,g 0 _DGIN_getValue 00000334 6b func ,g 1 _CLK_Evaluate 0000039f 92 func ,g 1 _CLK_Counter 00000431 4 func ,g 1 _IC_74HC166_Judge_State 00000435 42 func ,g 1 _IC_74HC166_Out_QH 00000477 77 func ,g 1 _IC74HC166_Counter 000004ee 4 func ,g 1 _DGOUT_setValue 000004f2 25 func ,g 1 __CommonCode@0 00000517 a func ,l 2 __CommonCode@1 00000521 9 func ,l 2 __CommonCode@2 0000052a c func ,l 2 __CommonCode@3 00000536 a func ,l 2 FILE=DefaultBuild\cstart.obj 00000540 00000581 42 _start 00000540 0 entry,g 0 _exit 00000580 0 none ,g 1 SECTION=.RLIB FILE=memset 00000582 0000058f e _memset 00000582 0 none ,g 4 FILE=_COM_imul 00000590 0000059e f __COM_imul 00000590 0 none ,g 1 FILE=_COM_ucdiv 0000059f 000005b6 18 __COM_ucdiv 0000059f 0 none ,g 1 FILE=_COM_ucrem 000005b7 000005cb 15 __COM_ucrem 000005b7 0 none ,g 2 FILE=_COM_uidiv 000005cc 000005e7 1c __COM_uidiv 000005cc 0 none ,g 2 SECTION=.bss FILE=DefaultBuild\main.obj 000ffce0 000ffcea b _I_04 000ffce0 1 data ,g 2 _g_ucDGIN_LastRet 000ffce1 1 data ,g 2 _g_ucDGIN_ElapsedTime 000ffce2 1 data ,g 3 _g_ucDGIN_Count 000ffce3 1 data ,g 8 _g_ucCLK_LastOut@1 000ffce4 1 data ,l 3 _g_ushCLK_ElapsedTime@2 000ffce6 2 data ,l 3 _g_ucCLK_Count@3 000ffce8 1 data ,l 6 _g74HC166_LastCK 000ffce9 1 data ,g 3 _g74HC166_LastValue 000ffcea 1 data ,g 4 SECTION=.dataR FILE=DefaultBuild\main.obj 000ffcec 000ffcef 4 _F0303 000ffcec 1 data ,g 2 _F0512 000ffced 1 data ,g 0 _F0600 000ffcee 1 data ,g 2 _g74HC166_Count 000ffcef 1 data ,g 8 SECTION=.sbss FILE=DefaultBuild\main.obj 000ffe20 000ffe26 7 _fTm10ms 000ffe20 1 data ,g 3 _fTrg50ms 000ffe21 1 data ,g 2 _fTrg1s 000ffe22 1 data ,g 2 _fTrg10ms 000ffe23 1 data ,g 4 _SysTm10ms 000ffe24 1 data ,g 3 _SysTm50ms 000ffe25 1 data ,g 3 _SysTm1s 000ffe26 1 data ,g 3 Absolute value symbols FILE=rlink_generates_03 __s.option_byte 000000c0 0 none ,g 0 __e.option_byte 000000c4 0 none ,g 0 __s.text 000000ce 0 none ,g 0 __e.text 00000582 0 none ,g 0 __s.data 00000082 0 none ,g 0 __e.data 00000086 0 none ,g 0 __s.bss 000ffce0 0 none ,g 0 __e.bss 000ffceb 0 none ,g 0 __s.sbss 000ffe20 0 none ,g 0 __e.sbss 000ffe27 0 none ,g 0 __s.textf 00000582 0 none ,g 0 __e.textf 00000582 0 none ,g 0 __s.const 00000080 0 none ,g 0 __e.const 00000080 0 none ,g 0 __s.constf 00000080 0 none ,g 0 __e.constf 00000080 0 none ,g 0 __s.sdata 00000080 0 none ,g 0 __e.sdata 00000080 0 none ,g 0 __s.dataR 000ffcec 0 none ,g 0 __e.dataR 000ffcf0 0 none ,g 0 __s.sdataR 000ffe28 0 none ,g 0 __e.sdataR 000ffe28 0 none ,g 0 __s.RLIB 00000582 0 none ,g 0 __e.RLIB 000005e8 0 none ,g 0 __s.SLIB 00000582 0 none ,g 0 __e.SLIB 00000582 0 none ,g 0 __s.vect 00000000 0 none ,g 0 __e.vect 00000080 0 none ,g 0 __s.security_id 000000c4 0 none ,g 0 __e.security_id 000000ce 0 none ,g 0 __RAM_ADDR_START 000ffce0 0 none ,g 1 __RAM_ADDR_END 000ffee0 0 none ,g 1 __STACK_ADDR_START 000ffe20 0 none ,g 1 __STACK_ADDR_END 000ffcfa 0 none ,g 0 *** Unfilled Areas *** AREA START END *** Delete Symbols *** SYMBOL SIZE INFO _fTx0Done 1 data ,g _fTx6Done 1 data ,g _F0500 1 data ,g _F0501 1 data ,g _F0502 1 data ,g _F0505 1 data ,g _F0506 1 data ,g _F0507 1 data ,g _F0508 1 data ,g _F0509 1 data ,g _F0510 1 data ,g _F0511 1 data ,g *** Variable Vector Table List *** ADDRESS SYMBOL/ADDRESS 00 _start 02 04 06 _MD_INTP0 08 _MD_INTP1 0a 0c 0e 10 12 _MD_INTTM00 14 16 18 1a _MD_INTP2 1c _MD_INTP3 1e 20 22 24 26 _MD_INTIT 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 56 58 5a 5c 5e 60 62 64 66 68 6a 6c 6e 70 72 74 76 78 7a 7c 7e *** Cross Reference List *** No Unit Name Global.Symbol Location External Infomation ---- ----------- --------------- -------- --------------------- 0001 opt_byte SECTION=.option_byte 0002 main SECTION=.sbss _fTm10ms 000ffe20 0002(00000158:.text) 0002(0000017a:.text) 0002(00000253:.text) _fTrg50ms 000ffe21 0002(00000154:.text) 0002(0000016b:.text) _fTrg1s 000ffe22 0002(00000156:.text) 0002(00000178:.text) _fTrg10ms 000ffe23 0002(00000102:.text) 0002(00000112:.text) 0002(00000152:.text) 0002(0000015d:.text) _SysTm10ms 000ffe24 0002(00000249:.text) 0002(0000024b:.text) 0002(00000251:.text) _SysTm50ms 000ffe25 0002(00000161:.text) 0002(00000163:.text) 0002(00000169:.text) _SysTm1s 000ffe26 0002(0000016e:.text) 0002(00000170:.text) 0002(00000176:.text) SECTION=.text _main 000000ce 0003(0000057d:.text) _main_loop 000000d6 0002(000000d5:.text) _hdwinit 000000e1 0002(000000cf:.text) 0003(00000545:.text) _panel_init0 000000eb 0002(000000d2:.text) _panel 000000f8 0002(000000d7:.text) _WDT_Reset 0000014d _TM_10ms 00000151 0002(000000dd:.text) _MOV1_ 0000017f _NOT1_ 00000180 _WAIT 00000187 _BitMemGet 00000194 0002(0000035f:.text) 0002(000003ab:.text) 0002(00000454:.text) _ByteMemGet 000001b1 0002(0000036a:.text) 0002(0000053d:.text) _BitMemSet 000001b9 0002(0000041e:.text) 0002(00000470:.text) 0002(0000051e:.text) _ByteMemSet 000001f4 0002(000002f9:.text) 0002(00000398:.text) 0002(0000049b:.text) 0002(00000533:.text) _Port_Set 000001fd 0002(00000515:.text) _Port_Get 00000229 0002(0000034a:.text) _MD_INTTM00 00000246 _TM00_Init 00000257 0002(000002e7:.text) _MD_INTP0 00000286 _MD_INTP1 00000288 _MD_INTP2 0000028a _MD_INTP3 0000028c _MD_INTIT 0000028e _INT_Init 00000290 0002(000002e4:.text) _PORT_Init 000002bb 0002(000002e1:.text) _WDT_Init 000002d8 _Clock_Init 000002d9 _SystemInit 000002da 0002(000000e5:.text) _DGIN_Initialize 000002e9 0002(000000ed:.text) _DGIN_Counter 000002fb 0002(000000f0:.text) 0002(0000010f:.text) _CLK_Initialize 000002ff 0002(000000f3:.text) _IC74HC166_Initialize 00000314 0002(000000f6:.text) _DGIN_Counter_Clear 00000328 _CLK_Counter_Clear 0000032c _IC74HC166_Counter_Clear 00000330 _DGIN_getValue 00000334 0002(00000107:.text) _CLK_Evaluate 0000039f 0002(00000119:.text) _CLK_Counter 00000431 0002(00000121:.text) _IC_74HC166_Judge_State 00000435 0002(0000012a:.text) _IC_74HC166_Out_QH 00000477 0002(0000013b:.text) _IC74HC166_Counter 000004ee 0002(00000143:.text) _DGOUT_setValue 000004f2 0002(0000014b:.text) SECTION=.bss _I_04 000ffce0 0002(0000010c:.text) 0002(00000133:.text) _g_ucDGIN_LastRet 000ffce1 0002(0000035c:.text) 0002(0000051b:.text) _g_ucDGIN_ElapsedTime 000ffce2 0002(000002f6:.text) 0002(00000367:.text) 0002(00000395:.text) _g_ucDGIN_Count 000ffce3 0002(000000f9:.text) 0002(000002f2:.text) 0002(000002fc:.text) 0002(00000329:.text) 0002(00000359:.text) 0002(00000364:.text) 0002(00000392:.text) 0002(00000518:.text) _g74HC166_LastCK 000ffce9 0002(00000318:.text) 0002(00000451:.text) 0002(0000046d:.text) _g74HC166_LastValue 000ffcea 0002(00000322:.text) 0002(00000498:.text) 0002(00000530:.text) 0002(0000053a:.text) SECTION=.dataR _F0303 000ffcec 0002(0000011e:.text) 0002(00000124:.text) _F0512 000ffced _F0600 000ffcee 0002(00000140:.text) 0002(00000146:.text) _g74HC166_Count 000ffcef 0002(000000ff:.text) 0002(00000331:.text) 0002(0000044e:.text) 0002(0000046a:.text) 0002(00000494:.text) 0002(000004ef:.text) 0002(0000052d:.text) 0002(00000537:.text) SECTION=.data 0003 cstart SECTION=.text _start 00000540 _exit 00000580 0003(00000581:.text) SECTION=.textf SECTION=.const SECTION=.constf SECTION=.data SECTION=.sdata SECTION=.bss SECTION=.sbss SECTION=.dataR SECTION=.sdataR SECTION=.RLIB SECTION=.SLIB SECTION=.dataR SECTION=.sdataR 0004 common 0005 timer 0006 int 0007 port 0008 watchdogtimer 0009 system 0010 systeminit 0011 panel 0012 digitalio 0013 clk 0014 74hc 0015 memset SECTION=.RLIB _memset 00000582 0002(00000306:.text) 0002(00000311:.text) 0002(0000031b:.text) 0002(00000325:.text) SECTION=.text 0016 _COM_imul SECTION=.RLIB __COM_imul 00000590 0002(000003c8:.text) SECTION=.text 0017 _COM_ucdiv SECTION=.RLIB __COM_ucdiv 0000059f 0002(00000524:.text) SECTION=.text 0018 _COM_ucrem SECTION=.RLIB __COM_ucrem 000005b7 0002(00000343:.text) 0002(0000050a:.text) SECTION=.text 0019 _COM_uidiv SECTION=.RLIB __COM_uidiv 000005cc 0002(000003d3:.text) 0002(000003e7:.text) SECTION=.text 0020 rlink_generates_01 SECTION=.vect 0021 rlink_generates_02 SECTION=.security_id 0022 rlink_generates_03 SECTION= __s.vect 00000000 __s.const 00000080 __e.const 00000080 __s.constf 00000080 __e.constf 00000080 __s.sdata 00000080 __e.sdata 00000080 __e.vect 00000080 __s.data 00000082 __e.data 00000086 __s.option_byte 000000c0 __e.option_byte 000000c4 __s.security_id 000000c4 __s.text 000000ce __e.security_id 000000ce __e.text 00000582 __s.textf 00000582 __e.textf 00000582 __s.RLIB 00000582 __s.SLIB 00000582 __e.SLIB 00000582 __e.RLIB 000005e8 __s.bss 000ffce0 __RAM_ADDR_START 000ffce0 0003(00000548:.text) __e.bss 000ffceb __s.dataR 000ffcec __e.dataR 000ffcf0 __STACK_ADDR_END 000ffcfa __s.sbss 000ffe20 __STACK_ADDR_START 000ffe20 0003(00000542:.text) __e.sbss 000ffe27 __s.sdataR 000ffe28 __e.sdataR 000ffe28 __RAM_ADDR_END 000ffee0 0003(0000054b:.text)