Renesas Optimizing Linker (W2.04.00 ) 14-May-2017 07:31:34 *** Options *** -subcommand=DefaultBuild\EZPLforRL78v2andCCRLv102.clnk -Input=DefaultBuild\cstart.obj -Input=DefaultBuild\opt_byte.obj -Input=DefaultBuild\main.obj -Input=DefaultBuild\common.obj -Input=DefaultBuild\timer.obj -Input=DefaultBuild\int.obj -Input=DefaultBuild\port.obj -Input=DefaultBuild\watchdogtimer.obj -Input=DefaultBuild\system.obj -Input=DefaultBuild\systeminit.obj -Input=DefaultBuild\panel.obj -Input=DefaultBuild\digitalio.obj -Input=DefaultBuild\clk.obj -Input=DefaultBuild\74hc.obj -SECURITY_ID=00000000000000000000 -DEVICE=E:\tools\micom\Renesas\CS+\CC\Device\RL78\Devicefile\DR5F10Y47.DVF -DEBug -NOCOmpress -OUtput=DefaultBuild\EZPLforRL78v2andCCRLv102.abs -LIBrary=E:\tools\micom\Renesas\CS+\CC\CC-RL\V1.02.00\lib\rl78nm4s.lib -LIBrary=E:\tools\micom\Renesas\CS+\CC\CC-RL\V1.02.00\lib\rl78nm4r.lib -ENTry=_start -LISt=DefaultBuild\EZPLforRL78v2andCCRLv102.map -SHow=ALL -AUTO_SECTION_LAYOUT -ROm=.data=.dataR -ROm=.sdata=.sdataR -NOMessage -NOLOgo -end *** Error information *** *** Mapping List *** SECTION START END SIZE ALIGN .vect 00000000 0000007f 80 0 .const 00000080 00000080 0 2 .constf 00000080 00000080 0 2 .sdata 00000080 00000080 0 2 .data 00000082 00000085 4 2 .option_byte 000000c0 000000c3 4 1 .security_id 000000c4 000000cd a 1 .textf 000000c4 000000c4 0 1 .SLIB 000000c4 000000c4 0 1 .text 000000ce 0000054e 481 1 .RLIB 00000583 000005e8 66 1 .bss 000ffce0 000ffcea b 2 .dataR 000ffcec 000ffcef 4 2 .sbss 000ffe20 000ffe26 7 2 .sdataR 000ffe28 000ffe28 0 2 *** Total Section Size *** RAMDATA SECTION: 00000016 Byte(s) ROMDATA SECTION: 00000092 Byte(s) PROGRAM SECTION: 000004e7 Byte(s) *** Symbol List *** SECTION= FILE= START END SIZE SYMBOL ADDR SIZE INFO COUNTS OPT SECTION=.vect FILE=rlink_generates_01 00000000 0000007f 80 SECTION=.data FILE=DefaultBuild\main.obj 00000082 00000085 4 SECTION=.option_byte FILE=DefaultBuild\opt_byte.obj 000000c0 000000c3 4 SECTION=.security_id FILE=rlink_generates_02 000000c4 000000cd a SECTION=.text FILE=DefaultBuild\cstart.obj 000000ce 0000010f 42 _start 000000ce 0 entry,g 0 _exit 0000010e 0 none ,g 1 FILE=DefaultBuild\main.obj 00000110 0000054e 43f _main 00000110 6 func ,g 1 ch _main_loop 00000116 b func ,g 1 _hdwinit 00000121 a func ,g 2 _panel_init0 0000012b d func ,g 1 _panel 00000138 55 func ,g 1 _TM_10ms 0000018d 2e func ,g 1 _BitMemGet 000001bb 1d func ,g 3 _ByteMemGet 000001d8 8 func ,g 2 _BitMemSet 000001e0 3b func ,g 3 _ByteMemSet 0000021b 9 func ,g 4 _Port_Set 00000224 2c func ,g 1 _Port_Get 00000250 1d func ,g 1 _MD_INTTM00 0000026d 11 func ,g 0 _TM00_Init 0000027e 2f func ,g 1 _MD_INTP0 000002ad 2 func ,g 0 _MD_INTP1 000002af 2 func ,g 0 _MD_INTP2 000002b1 2 func ,g 0 _MD_INTP3 000002b3 2 func ,g 0 _MD_INTIT 000002b5 2 func ,g 0 _INT_Init 000002b7 2b func ,g 1 _PORT_Init 000002e2 1d func ,g 1 _SystemInit 000002ff f func ,g 1 _DGIN_Initialize 0000030e 12 func ,g 1 _DGIN_Counter 00000320 4 func ,g 2 _CLK_Initialize 00000324 13 func ,g 1 ch _IC74HC166_Initialize 00000337 12 func ,g 1 ch _DGIN_getValue 00000349 6a func ,g 1 ch _CLK_Evaluate 000003b3 8f func ,g 1 ch _CLK_Counter 00000442 4 func ,g 1 _IC_74HC166_Judge_State 00000446 42 func ,g 1 _IC_74HC166_Out_QH 00000488 77 func ,g 1 _IC74HC166_Counter 000004ff 4 func ,g 1 _DGOUT_setValue 00000503 24 func ,g 1 ch __CommonCode@0 00000527 a func ,l 2 __CommonCode@1 00000531 8 func ,l 2 ch __CommonCode@2 00000539 c func ,l 2 __CommonCode@3 00000545 a func ,l 2 SECTION=.RLIB FILE=memset 00000583 00000590 e _memset 00000583 0 none ,g 4 FILE=_COM_imul 00000591 0000059f f __COM_imul 00000591 0 none ,g 1 FILE=_COM_ucdiv 000005a0 000005b7 18 __COM_ucdiv 000005a0 0 none ,g 1 FILE=_COM_ucrem 000005b8 000005cc 15 __COM_ucrem 000005b8 0 none ,g 2 FILE=_COM_uidiv 000005cd 000005e8 1c __COM_uidiv 000005cd 0 none ,g 2 SECTION=.bss FILE=DefaultBuild\main.obj 000ffce0 000ffcea b _I_04 000ffce0 1 data ,g 2 _g_ucDGIN_LastRet 000ffce1 1 data ,g 2 _g_ucDGIN_ElapsedTime 000ffce2 1 data ,g 3 _g_ucDGIN_Count 000ffce3 1 data ,g 7 _g_ucCLK_LastOut@1 000ffce4 1 data ,l 3 _g_ushCLK_ElapsedTime@2 000ffce6 2 data ,l 3 _g_ucCLK_Count@3 000ffce8 1 data ,l 5 _g74HC166_LastCK 000ffce9 1 data ,g 3 _g74HC166_LastValue 000ffcea 1 data ,g 4 SECTION=.dataR FILE=DefaultBuild\main.obj 000ffcec 000ffcef 4 _F0303 000ffcec 1 data ,g 2 _F0512 000ffced 1 data ,g 0 _F0600 000ffcee 1 data ,g 2 _g74HC166_Count 000ffcef 1 data ,g 7 SECTION=.sbss FILE=DefaultBuild\main.obj 000ffe20 000ffe26 7 _fTm10ms 000ffe20 1 data ,g 3 _fTrg50ms 000ffe21 1 data ,g 2 _fTrg1s 000ffe22 1 data ,g 2 _fTrg10ms 000ffe23 1 data ,g 4 _SysTm10ms 000ffe24 1 data ,g 3 _SysTm50ms 000ffe25 1 data ,g 3 _SysTm1s 000ffe26 1 data ,g 3 Absolute value symbols FILE=rlink_generates_03 __s.text 000000ce 0 none ,g 0 __e.text 0000054f 0 none ,g 0 __s.textf 000000c4 0 none ,g 0 __e.textf 000000c4 0 none ,g 0 __s.const 00000080 0 none ,g 0 __e.const 00000080 0 none ,g 0 __s.constf 00000080 0 none ,g 0 __e.constf 00000080 0 none ,g 0 __s.data 00000082 0 none ,g 0 __e.data 00000086 0 none ,g 0 __s.sdata 00000080 0 none ,g 0 __e.sdata 00000080 0 none ,g 0 __s.bss 000ffce0 0 none ,g 0 __e.bss 000ffceb 0 none ,g 0 __s.sbss 000ffe20 0 none ,g 0 __e.sbss 000ffe27 0 none ,g 0 __s.dataR 000ffcec 0 none ,g 0 __e.dataR 000ffcf0 0 none ,g 0 __s.sdataR 000ffe28 0 none ,g 0 __e.sdataR 000ffe28 0 none ,g 0 __s.RLIB 00000583 0 none ,g 0 __e.RLIB 000005e9 0 none ,g 0 __s.SLIB 000000c4 0 none ,g 0 __e.SLIB 000000c4 0 none ,g 0 __s.option_byte 000000c0 0 none ,g 0 __e.option_byte 000000c4 0 none ,g 0 __s.vect 00000000 0 none ,g 0 __e.vect 00000080 0 none ,g 0 __s.security_id 000000c4 0 none ,g 0 __e.security_id 000000ce 0 none ,g 0 __RAM_ADDR_START 000ffce0 0 none ,g 1 __RAM_ADDR_END 000ffee0 0 none ,g 1 __STACK_ADDR_START 000ffe20 0 none ,g 1 __STACK_ADDR_END 000ffcfa 0 none ,g 0 *** Unfilled Areas *** AREA START END *** Delete Symbols *** SYMBOL SIZE INFO _WDT_Reset 4 func ,g _MOV1_ 1 func ,g _NOT1_ 7 func ,g _WAIT d func ,g _WDT_Init 1 func ,g _Clock_Init 1 func ,g _DGIN_Counter_Clear 4 func ,g _CLK_Counter_Clear 4 func ,g _IC74HC166_Counter_Clear 4 func ,g _fTx0Done 1 data ,g _fTx6Done 1 data ,g _F0500 1 data ,g _F0501 1 data ,g _F0502 1 data ,g _F0505 1 data ,g _F0506 1 data ,g _F0507 1 data ,g _F0508 1 data ,g _F0509 1 data ,g _F0510 1 data ,g _F0511 1 data ,g *** Variable Vector Table List *** ADDRESS SYMBOL/ADDRESS 00 _start 02 04 06 _MD_INTP0 08 _MD_INTP1 0a 0c 0e 10 12 _MD_INTTM00 14 16 18 1a _MD_INTP2 1c _MD_INTP3 1e 20 22 24 26 _MD_INTIT 28 2a 2c 2e 30 32 34 36 38 3a 3c 3e 40 42 44 46 48 4a 4c 4e 50 52 54 56 58 5a 5c 5e 60 62 64 66 68 6a 6c 6e 70 72 74 76 78 7a 7c 7e *** Cross Reference List *** No Unit Name Global.Symbol Location External Infomation ---- ----------- --------------- -------- --------------------- 0001 cstart SECTION=.text _start 000000ce _exit 0000010e 0001(0000010f:.text) SECTION=.textf SECTION=.const SECTION=.constf SECTION=.data SECTION=.sdata SECTION=.bss SECTION=.sbss SECTION=.dataR SECTION=.sdataR SECTION=.RLIB SECTION=.SLIB SECTION=.dataR SECTION=.sdataR 0002 opt_byte SECTION=.option_byte 0003 main SECTION=.sbss _fTm10ms 000ffe20 0003(00000194:.text) 0003(000001b6:.text) 0003(0000027a:.text) _fTrg50ms 000ffe21 0003(00000190:.text) 0003(000001a7:.text) _fTrg1s 000ffe22 0003(00000192:.text) 0003(000001b4:.text) _fTrg10ms 000ffe23 0003(00000142:.text) 0003(00000152:.text) 0003(0000018e:.text) 0003(00000199:.text) _SysTm10ms 000ffe24 0003(00000270:.text) 0003(00000272:.text) 0003(00000278:.text) _SysTm50ms 000ffe25 0003(0000019d:.text) 0003(0000019f:.text) 0003(000001a5:.text) _SysTm1s 000ffe26 0003(000001aa:.text) 0003(000001ac:.text) 0003(000001b2:.text) SECTION=.text _main 00000110 0001(0000010b:.text) _main_loop 00000116 _hdwinit 00000121 0001(000000d3:.text) 0003(00000111:.text) _panel_init0 0000012b 0003(00000114:.text) _panel 00000138 0003(00000117:.text) _TM_10ms 0000018d 0003(0000011d:.text) _BitMemGet 000001bb 0003(00000373:.text) 0003(000003bf:.text) 0003(00000465:.text) _ByteMemGet 000001d8 0003(0000037e:.text) 0003(0000054c:.text) _BitMemSet 000001e0 0003(0000042f:.text) 0003(00000481:.text) 0003(0000052e:.text) _ByteMemSet 0000021b 0003(0000031e:.text) 0003(000003ac:.text) 0003(000004ac:.text) 0003(00000542:.text) _Port_Set 00000224 0003(00000525:.text) _Port_Get 00000250 0003(0000035e:.text) _MD_INTTM00 0000026d _TM00_Init 0000027e 0003(0000030c:.text) _MD_INTP0 000002ad _MD_INTP1 000002af _MD_INTP2 000002b1 _MD_INTP3 000002b3 _MD_INTIT 000002b5 _INT_Init 000002b7 0003(00000309:.text) _PORT_Init 000002e2 0003(00000306:.text) _SystemInit 000002ff 0003(00000125:.text) _DGIN_Initialize 0000030e 0003(0000012d:.text) _DGIN_Counter 00000320 0003(00000130:.text) 0003(0000014f:.text) _CLK_Initialize 00000324 0003(00000133:.text) _IC74HC166_Initialize 00000337 0003(00000136:.text) _DGIN_getValue 00000349 0003(00000147:.text) _CLK_Evaluate 000003b3 0003(00000159:.text) _CLK_Counter 00000442 0003(00000161:.text) _IC_74HC166_Judge_State 00000446 0003(0000016a:.text) _IC_74HC166_Out_QH 00000488 0003(0000017b:.text) _IC74HC166_Counter 000004ff 0003(00000183:.text) _DGOUT_setValue 00000503 0003(0000018b:.text) SECTION=.bss _I_04 000ffce0 0003(0000014c:.text) 0003(00000173:.text) _g_ucDGIN_LastRet 000ffce1 0003(00000370:.text) 0003(0000052b:.text) _g_ucDGIN_ElapsedTime 000ffce2 0003(0000031b:.text) 0003(0000037b:.text) 0003(000003a9:.text) _g_ucDGIN_Count 000ffce3 0003(00000139:.text) 0003(00000317:.text) 0003(00000321:.text) 0003(0000036d:.text) 0003(00000378:.text) 0003(000003a6:.text) 0003(00000528:.text) _g74HC166_LastCK 000ffce9 0003(0000033b:.text) 0003(00000462:.text) 0003(0000047e:.text) _g74HC166_LastValue 000ffcea 0003(00000344:.text) 0003(000004a9:.text) 0003(0000053f:.text) 0003(00000549:.text) SECTION=.dataR _F0303 000ffcec 0003(0000015e:.text) 0003(00000164:.text) _F0512 000ffced _F0600 000ffcee 0003(00000180:.text) 0003(00000186:.text) _g74HC166_Count 000ffcef 0003(0000013f:.text) 0003(0000045f:.text) 0003(0000047b:.text) 0003(000004a5:.text) 0003(00000500:.text) 0003(0000053c:.text) 0003(00000546:.text) SECTION=.data 0004 common 0005 timer 0006 int 0007 port 0008 watchdogtimer 0009 system 0010 systeminit 0011 panel 0012 digitalio 0013 clk 0014 74hc 0015 memset SECTION=.RLIB _memset 00000583 0003(0000032b:.text) 0003(00000335:.text) 0003(0000033e:.text) 0003(00000347:.text) SECTION=.text 0016 _COM_imul SECTION=.RLIB __COM_imul 00000591 0003(000003dc:.text) SECTION=.text 0017 _COM_ucdiv SECTION=.RLIB __COM_ucdiv 000005a0 0003(00000534:.text) SECTION=.text 0018 _COM_ucrem SECTION=.RLIB __COM_ucrem 000005b8 0003(00000358:.text) 0003(0000051b:.text) SECTION=.text 0019 _COM_uidiv SECTION=.RLIB __COM_uidiv 000005cd 0003(000003e6:.text) 0003(000003f9:.text) SECTION=.text 0020 rlink_generates_01 SECTION=.vect 0021 rlink_generates_02 SECTION=.security_id 0022 rlink_generates_03 SECTION= __s.vect 00000000 __s.const 00000080 __e.const 00000080 __s.constf 00000080 __e.constf 00000080 __s.sdata 00000080 __e.sdata 00000080 __e.vect 00000080 __s.data 00000082 __e.data 00000086 __s.option_byte 000000c0 __s.textf 000000c4 __e.textf 000000c4 __s.SLIB 000000c4 __e.SLIB 000000c4 __e.option_byte 000000c4 __s.security_id 000000c4 __s.text 000000ce __e.security_id 000000ce __e.text 0000054f __s.RLIB 00000583 __e.RLIB 000005e9 __s.bss 000ffce0 __RAM_ADDR_START 000ffce0 0001(000000d6:.text) __e.bss 000ffceb __s.dataR 000ffcec __e.dataR 000ffcf0 __STACK_ADDR_END 000ffcfa __s.sbss 000ffe20 __STACK_ADDR_START 000ffe20 0001(000000d0:.text) __e.sbss 000ffe27 __s.sdataR 000ffe28 __e.sdataR 000ffe28 __RAM_ADDR_END 000ffee0 0001(000000d9:.text)