我現在想要的功能:輸出數據到另一個mcu
mic input : 2個differential連接的mic
mcu master DAI
mclk : 3 MHz , sample rate:大概12kHz(因為是12M crystal除出來的)
i2s data type , 16bit word length ,16bit channel length
現在我可以設和讀那個i2c了,比對讀出來的數值也是對的
但是不知道是甚麼問題,有時候會有數據,但micbias只有0.2V左右的輸出
環境聲音加大也沒有影響到數值高低
但用手碰mic會干擾到提高輸出
有時候更加是沒有數據 micbias沒有輸出
我設定完system也沒有active
下面是我用canvas gui設好再抄出來,嘗試把所有寄存器都設一次的設定但是還是不行,麻煩看看有甚麼問題
(P.S. 因為剛才發現用canvas gui抄的好像有點問題,修改了一下)
現在情況是左聲道數值在-1200左右,右聲道是在個位數左右
但mic bias1跟2依然沒有反應
會不會是input filter設定問題?因為我是看著datasheet 選1L(Left)+2L(Right)的
再更新一次
現在一邊channel 是負900-1400 另一邊是正900-1400
i2c_write_reg(0x09, 0x80);//software reset i2c_write_reg(0x10, 0x00);//i2c set no timeout i2c_write_reg(0x00, 0x01);//System active i2c_write_reg(0x01, 0x01);//i2c repeat mode i2c_write_reg(0x0B, 0x33);//12kHz sample rate on adc and dac i2c_write_reg(0x0C, 0x02);//resync dai ,auto resynce , no free run (if adc feeding to dac direct set 1 to bit 0) i2c_write_reg(0x0D, 0x00);//gain ramp speed i2c_write_reg(0x14, 0xFC);//input enable adcl12/r12 / mic1/2 , bit 0 submit i2c_write_reg(0x15, 0x0D);//output disselect hpl/r , bit 0 submit i2c_write_reg(0x18, 0xA0);//in 1L filter enable i2c_write_reg(0x19, 0xA0);//in 1R filter enable i2c_write_reg(0x1A, 0xA0);//in 2L filter enable i2c_write_reg(0x1B, 0xA0);//in 2R filter enable i2c_write_reg(0x20, 0x40);//DAC_L disable i2c_write_reg(0x21, 0x40);//DAC_R disable i2c_write_reg(0x24, 0x00);//output high pass , voice filter disable i2c_write_reg(0x25, 0x77);//default value 5 band eq(band 1 2) i2c_write_reg(0x26, 0x77);//default value 5 band eq(band 3 4) i2c_write_reg(0x27, 0x07);//disable 5 bnad eq ;default value 5 band eq(band 5) i2c_write_reg(0x28, 0x40);//5-stage biquad disable and mute i2c_write_reg(0x29, 0x00);//5-stage biquad default data i2c_write_reg(0x2A, 0x00);//5-stage biquad default addr i2c_write_reg(0x2C, 0xA8);//enable mixin_1 i2c_write_reg(0x2D, 0x0F);//mixin_1 max gain i2c_write_reg(0x2E, 0xA8);//enable mixin_2 i2c_write_reg(0x2F, 0x0F);//mixin_2 max gain i2c_write_reg(0x30, 0x00);//disable ALC i2c_write_reg(0x31, 0x00);//default value alc i2c_write_reg(0x32, 0x00);//default value alc i2c_write_reg(0x33, 0x3F);//default value alc i2c_write_reg(0x34, 0x3F);//default value alc i2c_write_reg(0x35, 0x00);//default value alc i2c_write_reg(0x36, 0xFF);//default value alc i2c_write_reg(0x37, 0x71);//default value alc i2c_write_reg(0x38, 0x00);//default value alc i2c_write_reg(0x3C, 0x00);//disable adc gain swap(AGS) i2c_write_reg(0x3D, 0x09);//default value AGS i2c_write_reg(0x3E, 0x00);//default value AGS i2c_write_reg(0x3F, 0x00);//default value AGS i2c_write_reg(0x40, 0x00);//default value AGS i2c_write_reg(0x44, 0x00);//default value Calibration i2c_write_reg(0x4C, 0x00);//defuult value for inputsignal envelope i2c_write_reg(0x50, 0x00);//disable level detect to all channel i2c_write_reg(0x51, 0x7F);//default value lvl det i2c_write_reg(0x54, 0x24);//default value DAC Gain Swap(DGS) i2c_write_reg(0x55, 0x00);//default value DAC Gain Swap(DGS) i2c_write_reg(0x56, 0x50);//default value DAC Gain Swap(DGS) i2c_write_reg(0x57, 0xA3);//default value DAC Gain Swap(DGS) i2c_write_reg(0x58, 0x31);//default value DAC Gain Swap(DGS) i2c_write_reg(0x59, 0x11);//default value DAC Gain Swap(DGS) i2c_write_reg(0x5A, 0x01);//default value DAC Gain Swap(DGS) i2c_write_reg(0x5B, 0x74);//default value DAC Gain Swap(DGS) i2c_write_reg(0x5C, 0x01);//OUTDAI 1L select input 1L i2c_write_reg(0x5D, 0x1F);//max gain input filter 1L > OUTDAI 1L i2c_write_reg(0x5E, 0x00);//min gain input filter 1R > OUTDAI 1L i2c_write_reg(0x5F, 0x00);//min gain input filter 2L > OUTDAI 1L i2c_write_reg(0x60, 0x00);//min gain input filter 2R > OUTDAI 1L i2c_write_reg(0x61, 0x00);//min gain TONEGEN > OUTDAI 1L i2c_write_reg(0x62, 0x00);//min gain INDAI 1L > OUTDAI 1L i2c_write_reg(0x63, 0x00);//min gain INDAI 1R > OUTDAI 1L i2c_write_reg(0x64, 0x04);//OUTDAI 1R select input 2L i2c_write_reg(0x65, 0x00);//min gain input filter 1L > OUTDAI 1R i2c_write_reg(0x66, 0x00);//min gain input filter 1R > OUTDAI 1R i2c_write_reg(0x67, 0x1F);//max gain input filter 2L > OUTDAI 1R i2c_write_reg(0x68, 0x00);//min gain input filter 2R > OUTDAI 1R i2c_write_reg(0x69, 0x00);//min gain TONEGEN > OUTDAI 1R i2c_write_reg(0x6A, 0x00);//min gain INDAI 1L > OUTDAI 1R i2c_write_reg(0x6B, 0x00);//min gain INDAI 1R > OUTDAI 1R i2c_write_reg(0x6C, 0x00);//no input select for outfilt_1L i2c_write_reg(0x6D, 0x00);//min gain input filter 1L i2c_write_reg(0x6E, 0x00);//min gain input filter 1R i2c_write_reg(0x6F, 0x00);//min gain input filter 2L i2c_write_reg(0x70, 0x00);//min gain input filter 2R i2c_write_reg(0x71, 0x00);//min gain TONEGEN i2c_write_reg(0x72, 0x00);//min gain INDAI 1L i2c_write_reg(0x73, 0x00);//min gain INDAI 1R i2c_write_reg(0x74, 0x00);//no input select for outfilt_1R i2c_write_reg(0x75, 0x00);//min gain input filter 1L i2c_write_reg(0x76, 0x00);//min gain input filter 1R i2c_write_reg(0x77, 0x00);//min gain input filter 2L i2c_write_reg(0x78, 0x00);//min gain input filter 2R i2c_write_reg(0x79, 0x00);//min gain TONEGEN i2c_write_reg(0x7A, 0x00);//min gain INDAI 1L i2c_write_reg(0x7B, 0x00);//min gain INDAI 1R i2c_write_reg(0x7C, 0x00);//no input select for outfilt_2L i2c_write_reg(0x7D, 0x00);//min gain input filter 1L i2c_write_reg(0x7E, 0x00);//min gain input filter 1R i2c_write_reg(0x7F, 0x00);//min gain input filter 2L i2c_write_reg(0x80, 0x00);//min gain input filter 2R i2c_write_reg(0x81, 0x00);//min gain TONEGEN i2c_write_reg(0x82, 0x00);//min gain INDAI 1L i2c_write_reg(0x83, 0x00);//min gain INDAI 1R i2c_write_reg(0x84, 0x00);//no input select for outfilt_2R i2c_write_reg(0x85, 0x00);//min gain input filter 1L i2c_write_reg(0x86, 0x00);//min gain input filter 1R i2c_write_reg(0x87, 0x00);//min gain input filter 2L i2c_write_reg(0x88, 0x00);//min gain input filter 2R i2c_write_reg(0x89, 0x00);//min gain TONEGEN i2c_write_reg(0x8A, 0x00);//min gain INDAI 1L i2c_write_reg(0x8B, 0x00);//min gain INDAI 1R i2c_write_reg(0x8C, 0xA0);//DAI enable .channel 1L + 1R ,16 bits/chn, i2s i2c_write_reg(0x8D, 0x40);//no TDM mode ,datout driven when required i2c_write_reg(0x8E, 0x00);//dai no data offset i2c_write_reg(0x8F, 0x00);//dai no data offset i2c_write_reg(0x90, 0x00);//DAI Slave , 32bclk per wclk i2c_write_reg(0x91, 0x00);//pll mode reset i2c_write_reg(0x94, 0x20);//by apply to pll integer i2c_write_reg(0x91, 0x90);//SRM mode i2c_write_reg(0x92, 0x00);//pll_frac_top(default value) i2c_write_reg(0x93, 0x00);//pll_frac_bot(default value) i2c_write_reg(0x98, 0x00);//reference oscillator i2c_write_reg(0x9C, 0x00);//dac noise gate disable i2c_write_reg(0x9D, 0x00);//default value dac noise gate i2c_write_reg(0x9E, 0x00);//default value dac noise gate i2c_write_reg(0x9F, 0x00);//default value dac noise gate i2c_write_reg(0xA0, 0x00);//tonegen control i2c_write_reg(0xA1, 0x00);//default value tonegen i2c_write_reg(0xA2, 0x55);//default value tonegen i2c_write_reg(0xA3, 0x15);//default value tonegen i2c_write_reg(0xA4, 0x00);//default value tonegen i2c_write_reg(0xA5, 0x40);//default value tonegen i2c_write_reg(0xA6, 0x00);//default value tonegen i2c_write_reg(0xA7, 0x02);//default value tonegen i2c_write_reg(0xA8, 0x01);//default value tonegen i2c_write_reg(0xAC, 0x8c);//charge pump enable , level = cpvdd/1 , low power disabled i2c_write_reg(0xAD, 0x21);//default value charge pump i2c_write_reg(0xAE, 0x0E);//default value charge pump i2c_write_reg(0xB4, 0x80);//mic 1 amp enable and unmuted i2c_write_reg(0xB5, 0x07);//mic 1 max gain i2c_write_reg(0xB7, 0x00);//mic 1 input source :differential i2c_write_reg(0xB8, 0x80);//mic 2 amp enable and unmuted i2c_write_reg(0xB9, 0x07);//mic 2 max gain i2c_write_reg(0xBB, 0x00);//mic 2 input source :differential i2c_write_reg(0xBC, 0x00);//in 1 , adc high pass ,voice filter disable i2c_write_reg(0xBD, 0x00);//in 2 , adc high pass ,voice filter disable i2c_write_reg(0xC0, 0x04);//adc 1 anti-alias enable i2c_write_reg(0xC1, 0x04);//adc 2 anti-alias enable i2c_write_reg(0xC2, 0x00);//adc lvl det ,low power disable i2c_write_reg(0xCC, 0x00);//mixout_L disable i2c_write_reg(0xCD, 0x01);//min gain mixout_L i2c_write_reg(0xCE, 0x00);//mixout_R disable i2c_write_reg(0xCF, 0x03);//min gain mixout_R i2c_write_reg(0xD0, 0x40);//headphone amp L disable i2c_write_reg(0xD1, 0x15);//min gain headphone amp L i2c_write_reg(0xD2, 0x40);//headphone amp R disable i2c_write_reg(0xD3, 0x15);//min gain headphone amp L i2c_write_reg(0xD4, 0x00);//headphone det i2c_write_reg(0xD5, 0x00);//headphone differential select i2c_write_reg(0xD8, 0x0B);//accessory detect jack i2c_write_reg(0xD9, 0x00);//disable auto discharge micbias i2c_write_reg(0xDC, 0x08);//master bias enable i2c_write_reg(0xE0, 0x00);//io voltage range . 2.5 to 3.6 V i2c_write_reg(0xE1, 0x00);//LDO Bypassed i2c_write_reg(0xE4, 0x40);//sidetone disable i2c_write_reg(0xE5, 0x00);//no select adc for sidetone i2c_write_reg(0xE6, 0x1C);//default value sidetone i2c_write_reg(0xE8, 0x00);//default value sidetone i2c_write_reg(0xE9, 0x00);//default value sidetone i2c_write_reg(0xEA, 0x00);//default value sidetone i2c_write_reg(0xEB, 0x00);//default value sidetone i2c_write_reg(0xED, 0x00);//write 1 to clear hp det /lvl det i2c_write_reg(0xEE, 0x00);//event disable i2c_write_reg(0xF0, 0x00);//dmic1 disable i2c_write_reg(0xF1, 0x00);//dmic2 disable i2c_write_reg(0xF4, 0x7F);//max gain in 1L i2c_write_reg(0xF5, 0x00);//min gain in 1R i2c_write_reg(0xF6, 0x7F);//max gain in 2L i2c_write_reg(0xF7, 0x00);//min gain in 2R i2c_write_reg(0xF8, 0x00);//min gain out 1L i2c_write_reg(0xF9, 0x00);//min gain out 1R i2c_write_reg(0xFC, 0x77);//bias1,2 low power mode disable , level 3.0V i2c_write_reg(0xFD, 0x11);//enable bias 1,2
Hi,
Do you want to realize the stereo differential mic input to DAI out function?
How about the MCLK frequency?
Better you could provide the schematic.
Thanks!
the staff from the forum has contacted me. my mic bias were not powered as i want to use the another bypass mode DA7218 to provide the micbiasbut my i2c communication is messed up. the bypass mode DA7218 was unable to be set to power up the micbiasnow everything should be fine. and i am trying to test out the ALC function if it can fit my needmy setting above have some mistake though and not need to write the register that no use